ALU for Sensor Processor

EECE 585, Fall 2005 Project

This page details all the phases that the project will go through. A brief description of every phase is followed by a link to the full details of it.

Project Timeline

Read several papers about leakage reduction techniques in CMOS circuits.

Implemented the MTCMOS technique on a NAND  and NOR gates using 0.50 µm technology. A power and delay comparisons were done between the gates with MTCMOS  and those without, in both active and sleep modes.

9^th of October, 2005

2^nd of October, 2005

Implemented a 4-bit AND gate, 4-bit OR gate, 4-bit NOT gate.  (with/without MTCMOS ). Power and delay calculations were done for the designs.

16^th of October, 2005